StencilStream v3.0.0
SYCL-based Stencil Simulation Framework Targeting FPGAs
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Class Hierarchy

Go to the graphical class hierarchy

This inheritance list is sorted roughly, but not completely, alphabetically:
[detail level 12]
 Cstencil::AccessorSubscript< Cell, Accessor, access_mode, current_subdim >A helper class to support the double-subscript idiom for GridAccessors
 Cstencil::BaseTransitionFunctionBase class for transition functions that disables advanced features
 Cstencil::GenericID< T >A generic, two-dimensional index
 Cstencil::tdv::single_pass::InlineStrategy::GlobalState< TransFunc, max_n_iterations >
 Cstencil::tdv::single_pass::PrecomputeOnDeviceStrategy::GlobalState< TransFunc, max_n_iterations >
 Cstencil::tdv::single_pass::PrecomputeOnHostStrategy::GlobalState< TransFunc, max_n_iterations >
 Cstencil::cpu::Grid< Cell >A grid class for the CPU backend
 Cstencil::monotile::Grid< Cell, word_size >A grid class for the monotile architecture
 Cstencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >A grid class for the tiling architecture
 Cstencil::monotile::Grid< Cell, word_size >::GridAccessor< access_mode >An accessor for the monotile grid
 Cstencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >::GridAccessor< access_mode >An accessor for the monotile grid
 Csycl::host_accessor
 Cstencil::cpu::Grid< Cell >::GridAccessor< access_mode >An accessor for the grid
 Cstencil::tdv::single_pass::InlineStrategyA TDV implementation strategy that inlines the TDV function into the transition function
 Cstencil::tdv::single_pass::InlineStrategy::GlobalState< TransFunc, max_n_iterations >::KernelArgument
 Cstencil::tdv::single_pass::PrecomputeOnDeviceStrategy::GlobalState< TransFunc, max_n_iterations >::KernelArgument
 Cstencil::tdv::single_pass::PrecomputeOnHostStrategy::GlobalState< TransFunc, max_n_iterations >::KernelArgument
 Cstencil::tdv::single_pass::PrecomputeOnDeviceStrategy::GlobalState< TransFunc, max_n_iterations >::KernelArgument::LocalState
 Cstencil::tdv::single_pass::PrecomputeOnHostStrategy::GlobalState< TransFunc, max_n_iterations >::KernelArgument::LocalState
 Cstencil::Padded< T >A container with padding to the next power of two
 Cstencil::cpu::StencilUpdate< F >::ParamsParameters for the stencil updater
 Cstencil::monotile::StencilUpdate< F, n_processing_elements, max_grid_width, max_grid_height, TDVStrategy, word_size >::ParamsParameters for the stencil updater
 Cstencil::tiling::StencilUpdate< F, n_processing_elements, tile_width, tile_height, TDVStrategy >::ParamsParameters for the stencil updater
 Cstencil::tdv::single_pass::PrecomputeOnDeviceStrategyA TDV implementation strategy that precomputes TDVs on the device
 Cstencil::tdv::single_pass::PrecomputeOnHostStrategyA TDV implementation strategy that precomputes TDVs on the host
 Cstencil::Stencil< Cell, stencil_radius, TimeDependentValue >The stencil buffer
 Cstencil::cpu::StencilUpdate< F >A grid updater that applies an iterative stencil code to a grid
 Cstencil::monotile::StencilUpdate< F, n_processing_elements, max_grid_width, max_grid_height, TDVStrategy, word_size >A grid updater that applies an iterative stencil code to a grid
 Cstencil::tiling::StencilUpdate< F, n_processing_elements, tile_width, tile_height, TDVStrategy >A grid updater that applies an iterative stencil code to a grid
 Cstencil::monotile::StencilUpdateKernel< TransFunc, TDVKernelArgument, n_processing_elements, max_grid_width, max_grid_height, in_pipe, out_pipe >The execution kernel of the monotile architecture
 Cstencil::tiling::StencilUpdateKernel< TransFunc, TDVKernelArgument, n_processing_elements, output_tile_width, output_tile_height, in_pipe, out_pipe >A kernel that executes a stencil transition function on a tile