StencilStream v3.0.0
SYCL-based Stencil Simulation Framework Targeting FPGAs
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stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius > Member List

This is the complete list of members for stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >, including all inherited members.

copy_from_buffer(sycl::buffer< Cell, 2 > input_buffer)stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
copy_to_buffer(sycl::buffer< Cell, 2 > output_buffer)stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
dimensionsstencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >static
get_grid_height() conststencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
get_grid_width() conststencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
get_tile_range() conststencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
Grid(uindex_t grid_width, uindex_t grid_height)stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
Grid(sycl::range< 2 > range)stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
Grid(sycl::buffer< Cell, 2 > input_buffer)stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
Grid(Grid const &other_grid)stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
make_similar() conststencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
submit_read(sycl::queue &queue, uindex_t tile_c, uindex_t tile_r, Cell halo_value)stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline
submit_write(sycl::queue queue, uindex_t tile_c, uindex_t tile_r)stencil::tiling::Grid< Cell, tile_width, tile_height, halo_radius >inline